1. Field of the Invention
The present invention relates to a sustain driver for applying a discharge sustain pulse voltage to electrodes of a plasma display panel.
2. Description of the Related Art
Plasma display devices, as shown in FIG. 4, comprise a PDP 101, a sustain driver 102, a scan driver 103, a data driver 104, and a panel control unit 105.
In the PDP 101 with a three-electrode surface discharge structure, address electrodes A are arranged in the vertical direction of the panel on a rear-surface substrate, and sustain electrodes X and scanning electrodes Y are arranged alternately in the transverse direction of the panel on the rear-surface substrate.
The sustain electrodes X are connected to each other and have substantially the same potential. The potential of the address electrodes A and scanning electrodes Y can be varied by one electrode at a time with the data driver 104 and scan driver 103.
Discharge cells P are provided in the intersection points of address electrodes A and electrode pairs composed of adjacent sustain electrodes X and scanning electrodes Y. A gas is sealed inside each discharge cell P. A dielectric layer, a protective layer for protecting the electrodes and dielectric layer, and a fluorescent layer comprising a fluorescent substance are provided on the surface of discharge cells P.
In the fluorescent layer, fluorescent substances emitting fluorescence of RGB colors is pasted in each discharge cell, and each discharge cell constitutes a sub-pixel cell of one color of RGB. Sub-pixels of three colors of RGB constitute one pixel.
The sustain driver 102 drives all the sustain electrodes X of the PDP 101 at the same time and outputs a discharge sustain pulse voltage which is periodically repeated for the prescribed interval.
The scan driver 103 individually changes each potential of scan electrodes Y of the PDP 101. In particular, it applies the scan pulse voltage in the prescribed order to the scan electrodes Y.
The data driver 104 individually changes each potential of the address electrodes A of the PDP 101. In particular, it stores a video signal for each line, selects an address electrode A in a row where the sub-pixels that have to emit light are located, and applies the address pulse voltage to the selected address electrode.
The panel control unit 105 controls the timing of pulse voltages produced by the sustain driver 102, scan driver 103, and data driver 104.
Because a high output voltage level is required for the sustain driver 102, the circuit thereof is composed by using elements with a high voltage resistance. Furthermore, in order to increase the power source efficiency of the circuit, a boot strap circuit is often employed for returning the output amplitude to the power source line of the control circuit so that the circuit functions effectively only when the output voltage waveform is at a high level.
FIG. 5 shows the sustain driver 102 comprising a boot strap circuit. The connection point OUT of output MOS transistors 36, 37 is connected to sustain electrodes X.
Here, the sustain driver 102 is composed of an integrated semiconductor device. A power source terminal VCC, a ground terminal GND, a high-potential power source terminal VB, an output terminal HO, and a low-potential terminal VS are the external terminals of the semiconductor device. An input circuit 1, a level shift circuit 2, a signal reception circuit 3, a reference voltage circuit 20, a protection circuit 7, and an output circuit 18 are integrated inside the semiconductor device.
An island region constituting a floating block 19 with a high voltage resistance is connected to a high-potential power source terminal VB, which is at a highest potential in the semiconductor device and is higher than the potential of the power source terminal VCC, and the floating block is biased to this highest potential. The signal reception circuit 3, reference voltage circuit 20, protection circuit 7, and output circuit 18 are included in the element formation region in the floating block 19 with a high voltage resistance.
In such a sustain driver 102, an input signal HIN, which is inputted from the outside, is received via the input circuit 1, the level shift circuit 2 shifts the output signal level of the input circuit 1 and transmits it to the signal reception circuit 3 located in the floating block 19 with a high voltage resistance.
The signal reception circuit 3 conducts shaping of the pulse waveform. The output circuit 18 is a circuit for expanding the output current performance and serves as a power amplifier of the output signal of the signal processing circuit. The sustain driver 102 also conducts a high-speed switching drive of the gate of the output MOS transistor 36 connected to the output terminal HO.
The reference voltage circuit 20 is composed of a serial circuit of a diode-connected MOS transistor 22 having a drain and a gate commonly connected and a resistor 21 connected between the drain of the transistor and the high-potential power source terminal VB. The voltage between the source and drain of the MOS transistor 22 is picked up as the reference voltage Vref. This reference voltage is equal to the threshold voltage Vt of the MOS transistor 22.
The protection circuit 7 performs resistance division of the voltage between the high-potential power source terminal VB and low-potential power source terminal VS by the resistors 5, 6 and monitors the abnormality of the power source voltage (voltage between the high-potential power source terminal VB and low-potential power source terminal VS) inside the floating block 19 with a high voltage resistance by comparing the resistance divided potential with the drain potential of the MOS transistor with a comparator 4.
Further, a wired AND circuit is constituted by connecting the output terminal of the comparator 4 to the input terminal of the output circuit 18. As a result, if the power source voltage of the floating block 19 with a high voltage resistance abnormally increases, the output of the comparator 4 assumes a low level, the input of the output circuit 18 is shielded, and the operation of the output circuit 18 is terminated. Further, the application of excessively high voltage to the power transistor constituting the output circuit 18 or output MOS transistor 36, 37 externally connected to the output terminal HO is prevented and those transistors are protected from breakdown.
The output MOS transistor 37 is controlled via an input circuit 40, a signal processing circuit 41, and an output circuit 42 based on the input signal LIN inputted from the outside.
While the output MOS transistor 37 is ON in the circuit shown in FIG. 5, a voltage lowered by VF≈0.7 V of a diode 38 is applied from the low-potential power source VCC to a capacitor 39. While the output MOS transistor 36 is ON, the voltage on the VS terminal rises almost to the HV voltage and, the high-voltage power source VB becomes at “VS+VCC−0.7” V. The high-voltage power source VB varies depending on the ON time of the output MOS transistors 36, 37 and capacitance of the capacitor 39.
For this reason, the circuit operates in a state in which the power source voltage of the control circuit fluctuates, and if the surge voltage is superimposed on the power source voltage, there is a risk of the control circuit being damaged. Moreover, there is also a risk of the output MOS transistors 36, 37 being damaged.
For this reason, a protection operation function against the surge voltage superimposed on the power source voltage is also required. A stable reference voltage source is necessary to demonstrate this protection operation function with high stability.
The configuration shown in FIG. 5 uses a simple reference voltage circuit 20 composed of a serial circuit of a MOS transistor 22 and a resistor 21, and the reference voltage Vref depends on the threshold voltage Vt of the MOS transistor 22. The value of the threshold voltage Vt of the MOS transistor 22 differs because of a spread occurring in the manufacture of MOS transistors or has inherent dependency on temperature. As a result, the detection sensitivity of the protection circuit 7 is different for each semiconductor device, or the detection sensitivity changes depending on the ambient temperature, and the circuit operation of the semiconductor device is difficult to ensure.
Accordingly, even if the number of MOS transistors constituting the circuit is increased and a linear circuit (reference voltage circuit) with a stable temperature characteristic and a small spread is designed, the mutual spread of electric characteristics between the MOS transistors contained in the semiconductor device is large. As a result, the spread cannot be decreased to a level of linear circuits composed of bipolar transistors.
Further, generally, in the case of semiconductor devices composed of bipolar transistors, a mutual spread between the bipolar transistors is small. As a result, the accuracy is good and a reference voltage circuit 20 with a small spared of absolute values can be easily constituted. However, if the consideration is based on the assumption that the sustain drive 102 is integrated in the semiconductor device, then a high voltage resistance characteristic of 400 V or higher is required for the bipolar transistors used in the sustain driver 102 and bipolar transistors for a high voltage resistance have to be used.
A problem associated with bipolar transistors with a high voltage resistance is that a guard ring has to be formed inside the island region forming the transistor, and the unit shape becomes larger than that of the usual bipolar transistor. This issue will be described hereinbelow.
FIG. 6A shows a plan view configuration of the floating block 19 with a high voltage resistance that is formed in a semiconductor substrate. FIG. 6B is a plan view of an NPN bipolar transistor. FIGS. 6A and 6B have the same enlargement ratio.
As shown in FIG. 6B, the outermost periphery of the NPN bipolar transistor is electrically separated by a separation and diffusion region 23 in order to cause the NPN bipolar transistor to function as a unit element. The main portion providing for the transistor action of the NPN bipolar transistor is a transistor active region 24 located in the center of a transistor island region. A collector diffusion layer, a base diffusion layer, an emitter diffusion layer, and electrodes connected thereto (not shown in the figures) are formed in the transistor active region 24. As for the element voltage resistance of the NPN bipolar transistor, a high voltage resistance characteristic is ensured by forming guard rings 25a, 25b, 25c between the transistor active region 24 and separation and diffusion region. In order to ensure even higher voltage resistance, the number of guard rings has to be increased and a large surface area for forming the guard rings is necessary around the transistor active region 24.
The floating block 19 with a high voltage resistance is formed in the island region formed by an N-type semiconductor, as shown in FIG. 6A. Semiconductor elements such as MOS transistors, resistors, and capacitors are integrated in the central part thereof, those element guard groups are formed in the element formation region 26 (a size of about 200 μm×400 μm), a guard ring region with a width of about 100 μm is provided around the element formation region 26, and a separation and diffusion region 27 is formed on the outermost periphery. As a result, the floating block 19 with a high voltage resistance has a size of about 400 μm×600 μm.
The floating block 19 with a high voltage resistance is also provided with guard rings 28a, 28b, 28c between the element formation region 26 and the separation and diffusion region 27, the entire element formation region 26 is tied up, and voltage resistance is increased. The necessity of providing guard rings on the peripheral portion of the element formation region 26 with the object of increasing the voltage resistance of elements was disclosed in Japanese Patent Application Laid-open No. H6-21358.
Further, in order to configure a stable reference voltage circuit, at least two NPN bipolar transistors are required, and a plurality of guard rings are necessary in the element region of the NPN bipolar transistors with a high voltage resistance in order to obtain a configuration composed of NPN bipolar transistors with a high voltage resistance that are separated from the peripheral portion and act independently. Moreover, the guard ring region where the guard rings are disposed is required to have a surface area that increases with the increase in the required voltage resistance. For example, as shown in FIG. 6B, in the area necessary for forming one NPN bipolar transistor having a voltage resistance of about 400 V, the size of the transistor active region 24, which is the main portion responsible for transistor operation, is about 40 μm×60 μm, and the width of the guard ring region where three guard rings are formed is about 100 μm.
More specifically, as shown in FIG. 7, in order to stabilize the reference voltage circuit 20, the NPN bipolar transistors 23A, 23B are disposed on the outside of the floating block 19 with a high voltage resistance. Therefore, a large surface area is necessary and the degree of integration of the semiconductor device is decreased.
As described hereinabove, when a reference voltage circuit 20 with a simple circuit configuration shown in FIG. 5 was employed, the problem was that the production spread of the resistor 21 or MOS transistor 22 was large, in particular, the spread in the threshold voltage Vt of the MOS transistor 22 degraded the detection accuracy of the protection circuit 7 and sufficient electric characteristics of the semiconductor device could not be guaranteed. For all that, in the case of forming a circuit by using a large number of MOS transistors, a sufficient accuracy of relative values of the MOS transistors cannot be obtained and a circuit design ensuring absolute values of detection accuracy of the protection circuit 7 is difficult to provide.
When bipolar transistors with good accuracy of relative values are used, it is possible to configure a reference voltage circuit that can ensure the absolute value of the operating voltage. However, the problem is that bipolar transistors with a high voltage resistance characteristic are required for integrating the sustain drive 102, and configuring the circuit by using bipolar transistors with a high voltage resistance that comprise guard rings degrades the degree of integration of the semiconductor device.
It is the first object of the present invention to resolve the above-described problems and to provide a semiconductor device that can be integrated without using bipolar transistors with a high voltage resistance that comprise guard rings.
It is the second object of the present invention to provide a semiconductor device with a high voltage resistance that has incorporated therein a protection circuit capable of ensuring stable circuit operation.